Overview
- Is the only comprehensive book on power-aware test for (low power) circuits and systems
- Instructs readers how low-power devices can be tested safely without affecting yield and reliability
- Includes necessary background information on design for test and low-power design
- Incorporates detailed coverage of all levels of abstraction for power-aware testing of (low-power) circuits and systems
- Presents state-of-the-art industrial practices and EDA solutions
- Includes supplementary material: sn.pub/extras
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Table of contents (11 chapters)
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Front Matter
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Back Matter
Keywords
About this book
Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.
Editors and Affiliations
Bibliographic Information
Book Title: Power-Aware Testing and Test Strategies for Low Power Devices
Editors: Patrick Girard, Nicola Nicolici, Xiaoqing Wen
DOI: https://doi.org/10.1007/978-1-4419-0928-2
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer-Verlag US 2010
Hardcover ISBN: 978-1-4419-0927-5Published: 23 November 2009
Softcover ISBN: 978-1-4899-8313-8Published: 05 September 2014
eBook ISBN: 978-1-4419-0928-2Published: 11 March 2010
Edition Number: 1
Number of Pages: XXI, 363
Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design