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Noise-Shaping All-Digital Phase-Locked Loops

Modeling, Simulation, Analysis and Design

  • Book
  • © 2014

Overview

Authors:
  1. Francesco Brandonisio

    1. Tyndall National Institute, Cork, Ireland

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    You can also search for this author in PubMed   Google Scholar

  2. Michael Peter Kennedy

    1. University College Cork, Cork, Ireland

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    You can also search for this author in PubMed   Google Scholar

  • Discusses in detail a wide range of all-digital phase-locked loops architectures
  • Presents a unified framework in which to model time-to-digital converters for ADPLLs
  • Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs
  • Describes an efficient approach to model ADPLLS
  • Includes Simulink and Matlab code to reproduce the examples in the book
  • Includes supplementary material: sn.pub/extras

Part of the book series: Analog Circuits and Signal Processing (ACSP)

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Table of contents (7 chapters)

  1. Front Matter

    Pages i-xiii
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  2. Introduction

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 1-5

  3. Phase Digitization in All-Digital PLLs

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 7-38

  4. A Unifying Framework for TDC Architectures

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 39-68

  5. Analytical Predictions of Phase Noise in ADPLLs

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 69-99

  6. Advantages of Noise Shaping and Dither

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 101-110

  7. Efficient Modeling and Simulation of Accumulator-Based ADPLLs

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 111-141

  8. Modelling and Estimating Phase Noise with Matlab

    • Francesco Brandonisio, Michael Peter Kennedy
    Pages 143-152

  9. Back Matter

    Pages 153-177
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Keywords

About this book

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.

Authors and Affiliations

  • Tyndall National Institute, Cork, Ireland

    Francesco Brandonisio

  • University College Cork, Cork, Ireland

    Michael Peter Kennedy

Bibliographic Information

  • Book Title: Noise-Shaping All-Digital Phase-Locked Loops

  • Book Subtitle: Modeling, Simulation, Analysis and Design

  • Authors: Francesco Brandonisio, Michael Peter Kennedy

  • Series Title: Analog Circuits and Signal Processing

  • DOI: https://doi.org/10.1007/978-3-319-03659-5

  • Publisher: Springer Cham

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer International Publishing Switzerland 2014

  • Hardcover ISBN: 978-3-319-03658-8Published: 08 January 2014

  • Softcover ISBN: 978-3-319-34441-6Published: 27 August 2016

  • eBook ISBN: 978-3-319-03659-5Published: 17 December 2013

  • Series ISSN: 1872-082X

  • Series E-ISSN: 2197-1854

  • Edition Number: 1

  • Number of Pages: XIII, 177

  • Number of Illustrations: 66 b/w illustrations, 79 illustrations in colour

  • Topics: Circuits and Systems, Signal, Image and Speech Processing, Electronics and Microelectronics, Instrumentation

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