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More than Moore Technologies for Next Generation Computer Design

  • Book
  • © 2015

Overview

  • Introduces novel memories, using new materials and processing techniques, offering many advantages over dynamic memories such as traditional SRAM and e-DRAM
  • Describes 3D integration of integrated circuits, enabling stacking of layers and shrinking device to device distance over traditional packages
  • Enables readers to use on-chip integrated optics for interconnect
  • Includes coverage of technology, design, and design automation

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Table of contents (8 chapters)

Keywords

About this book

This book provides a comprehensive overview of key technologies being used to address challenges raised by continued device scaling and the extending gap between memory and central processing unit performance. Authors discuss in detail what are known commonly as “More than Moore” (MtM), technologies, which add value to devices by incorporating functionalities that do not necessarily scale according to “Moore's Law”. Coverage focuses on three key technologies needed for efficient power management and cost per performance: novel memories, 3D integration and photonic on-chip interconnect.

Editors and Affiliations

  • IBM, Hopewell Junction, USA

    Rasit O. Topaloglu

About the editor

Rasit O. Topaloglu is an Advisory R&D Engineer at IBM.

Bibliographic Information

  • Book Title: More than Moore Technologies for Next Generation Computer Design

  • Editors: Rasit O. Topaloglu

  • DOI: https://doi.org/10.1007/978-1-4939-2163-8

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science+Business Media New York 2015

  • Hardcover ISBN: 978-1-4939-2162-1

  • Softcover ISBN: 978-1-4939-4710-2

  • eBook ISBN: 978-1-4939-2163-8

  • Edition Number: 1

  • Number of Pages: IX, 218

  • Number of Illustrations: 53 b/w illustrations, 63 illustrations in colour

  • Topics: Circuits and Systems, Electronics and Microelectronics, Instrumentation, Processor Architectures

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