Overview
- Editors:
-
-
Wim Vanderbauwhede
-
School of Computing Science, University of Glasgow, Glasgow, UK
-
Khaled Benkrid
-
School of Engineering and Electronics, The University of Edinburgh, Edinburgh, UK
- Presents a taxonomy of existing high performance reconfigurable computer architectures
- Examines the software tools used in the design and programming of HPRC systems
- Discusses the future of HPRC and speculates on the shape of future HPRC systems
- Includes supplementary material: sn.pub/extras
Access this book
Other ways to access
Table of contents (26 chapters)
-
-
Applications
-
-
- Christian de Schryver, Henning Marxen, Stefan Weithoffer, Norbert Wehn
Pages 3-32
-
- Xiang Tian, Khaled Benkrid
Pages 33-80
-
-
- M. A. Khan, M. Chiu, M. C. Herbordt
Pages 105-135
-
- Yoshiki Yamaguchi, Yasunori Osana, Masato Yoshimi, Hideharu Amano
Pages 137-175
-
- Will X. Y. Li, Rosa H. M. Chan, Wei Zhang, Chiwai Yu, Dong Song, Theodore W. Berger et al.
Pages 177-207
-
- Wim Vanderbauwhede, Sai. R. Chalamalasetti, Martin Margala
Pages 209-244
-
- Valery Sklyarov, Iouliia Skliarova
Pages 245-277
-
-
- Victor Medeiros, Abner Barros, Abel Silva-Filho, Manoel E. de Lima
Pages 305-334
-
- Tim Güneysu, Timo Kasper, Martin Novotný, Christof Paar, Lars Wienbrandt, Ralf Zimmermann
Pages 335-366
-
- Tsuyoshi Hamada, Yuichiro Shibata
Pages 367-387
-
- Nachiket Kapre, André DeHon
Pages 389-427
-
Architectures
-
Front Matter
Pages 429-429
-
-
- Javier Castillo, Jose Luis Bosque, Cesar Pedraza, Emilio Castillo, Pablo Huerta, Jose Ignacio Martinez
Pages 453-479
-
- M. Baity-Jesi, R. A. Baños, A. Cruz, L. A. Fernandez, J. M. Gil-Narvion, A. Gordillo-Guerrero et al.
Pages 481-506
-
- Mondrian Nüssle, Holger Fröning, Sven Kapferer, Ulrich Brüning
Pages 507-542
About this book
High-Performance Computing using FPGA covers the area of high performance reconfigurable computing (HPRC). This book provides an overview of architectures, tools and applications for High-Performance Reconfigurable Computing (HPRC). FPGAs offer very high I/O bandwidth and fine-grained, custom and flexible parallelism and with the ever-increasing computational needs coupled with the frequency/power wall, the increasing maturity and capabilities of FPGAs, and the advent of multicore processors which has caused the acceptance of parallel computational models. The Part on architectures will introduce different FPGA-based HPC platforms: attached co-processor HPRC architectures such as the CHREC’s Novo-G and EPCC’s Maxwell systems; tightly coupled HRPC architectures, e.g. the Convey hybrid-core computer; reconfigurably networked HPRC architectures, e.g. the QPACE system, and standalone HPRC architectures such as EPFL’s CONFETTI system. The Part on Tools will focus on high-level programming approaches for HPRC, with chapters on C-to-Gate tools (such as Impulse-C, AutoESL, Handel-C, MORA-C++); Graphical tools (MATLAB-Simulink, NI LabVIEW); Domain-specific languages, languages for heterogeneous computing(for example OpenCL, Microsoft’s Kiwi and Alchemy projects). The part on Applications will present case from several application domains where HPRC has been used successfully, such as Bioinformatics and Computational Biology; Financial Computing; Stencil computations; Information retrieval; Lattice QCD; Astrophysics simulations; Weather and climate modeling.
Editors and Affiliations
-
School of Computing Science, University of Glasgow, Glasgow, UK
Wim Vanderbauwhede
-
School of Engineering and Electronics, The University of Edinburgh, Edinburgh, UK
Khaled Benkrid
About the editors
Wim Vanderbauwhede is currently a Lecturer at the Department of Computing Science of the University of Glasgow.
Dr. Benkrid is currently a Senior Lecturer at School of Engineering and Electronics at The University of Edinburgh.
