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Provides practical solutions for delay and power reduction for on-chip interconnects and buses
Offers in depth analysis of delay, including details regarding crosstalk and parasitic
Describes use of the Schmitt Trigger as a versatile alternative approach to buffer insertion for delay and power reduction in VLSI interconnects
This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects.