Low Power Interconnect Design

1. Front Matter

   Pages i-xvii

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2. Basics of Interconnect Design

   1. Front Matter

      Pages 1-1

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   2. Introduction to Interconnects

      • Sandeep Saini

      Pages 3-31

   3. CMOS Buffer

      • Sandeep Saini

      Pages 33-54

3. Buffer and Schmidt Trigger Insertion Techniques for Low Power Interconnect Design

   1. Front Matter

      Pages 55-55

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   2. Buffer Insertion as a Solution to Interconnect Issues

      • Sandeep Saini

      Pages 57-74

   3. Schmidt Trigger Approach

      • Sandeep Saini

      Pages 75-112

4. Bus Coding Techniques for Low Power Interconnect Design

   1. Front Matter

      Pages 113-113

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   2. Bus Coding Techniques

      • Sandeep Saini

      Pages 115-152

This book provides practical solutions for delay and power reduction for on-chip interconnects and buses.  It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system.  Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.

• Embedded Systems
• Integrated Circuit Design
• Interconnect Buffer Insertion
• Network on Chip
• On-chip interconnect
• Schmitt Trigger

• The LNM Institute of Information Technol, Jaipur, India

  Sandeep Saini

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