Authors:
Presents detailed analysis of various power optimization problems associated with high-level synthesis, as well as novel techniques for reducing power consumption of hardware designs at higher level of abstraction
Discusses various formal verification issues associated with synthesizing different possible versions of a hardware design (differing in their latency, area, and/or power consumption)
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Table of contents (10 chapters)
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Front Matter
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Back Matter
About this book
Authors and Affiliations
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Intel Corporation, Austin, USA
Gaurav Singh
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Bradley Dept. Electrical &, Computer Engineering, Virginia Tech, Blacksburg, USA
Sandeep K. Shukla
Bibliographic Information
Book Title: Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications
Authors: Gaurav Singh, Sandeep K. Shukla
DOI: https://doi.org/10.1007/978-1-4419-6481-6
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media, LLC 2010
Hardcover ISBN: 978-1-4419-6480-9Published: 12 August 2010
Softcover ISBN: 978-1-4899-8702-0Published: 18 September 2014
eBook ISBN: 978-1-4419-6481-6Published: 23 July 2010
Edition Number: 1
Number of Pages: XXX, 154
Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design