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Power-Aware Testing and Test Strategies for Low Power Devices

  • Book
  • © 2010

Overview

Editors:
  1. Patrick Girard

    1. de Robotique de Microélectronique de, LIRMM - Laboratoire d'Informatique, Montpellier, France

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  2. Nicola Nicolici

    1. Dept. Electrical &, McMaster University, Hamilton, Canada

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  3. Xiaoqing Wen

    1. Dept. Computer Science & Electronics, Kyushu Institute of Technology, Iizuka, Japan

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  • Is the only comprehensive book on power-aware test for (low power) circuits and systems
  • Instructs readers how low-power devices can be tested safely without affecting yield and reliability
  • Includes necessary background information on design for test and low-power design
  • Incorporates detailed coverage of all levels of abstraction for power-aware testing of (low-power) circuits and systems
  • Presents state-of-the-art industrial practices and EDA solutions
  • Includes supplementary material: sn.pub/extras

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About this book

Managing the power consumption of circuits and systems is now considered one of the most important challenges for the semiconductor industry. Elaborate power management strategies, such as dynamic voltage scaling, clock gating or power gating techniques, are used today to control the power dissipation during functional operation. The usage of these strategies has various implications on manufacturing test, and power-aware test is therefore increasingly becoming a major consideration during design-for-test and test preparation for low power devices. This book explores existing solutions for power-aware test and design-for-test of conventional circuits and systems, and surveys test strategies and EDA solutions for testing low power devices.

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Table of contents (11 chapters)

  1. Front Matter

    Pages i-xxiii
    Download chapter PDF

  2. Fundamentals of VLSI Testing

    • Laung-Terng Wang, Charles E. Stroud
    Pages 1-29

  3. Power Issues During Test

    • Sandip Kundu, Alodeep Sanyal
    Pages 31-63

  4. Low-Power Test Pattern Generation

    • Xiaoqing Wen, Seongmoon Wang
    Pages 65-115

  5. Power-Aware Design-for-Test

    • Hans-Joachim Wunderlich, Christian G. Zoellin
    Pages 117-146

  6. Power-Aware Test Data Compression and BIST

    • Sandeep Kumar Goel, Krishnendu Chakrabarty
    Pages 147-173

  7. Power-Aware System-Level Test Planning

    • Erik Larsson, C. P. Ravikumar
    Pages 175-211

  8. Low-Power Design Techniques and Test Implications

    • Kaushik Roy, Swarup Bhunia
    Pages 213-242

  9. Test Strategies for Multivoltage Designs

    • Saqib Khursheed, Bashir M. Al-Hashimi
    Pages 243-271

  10. Test Strategies for Gated Clock Designs

    • Brion Keller, Krishna Chakravadhanula
    Pages 273-293

  11. Test of Power Management Structures

    • Mark Kassab, Mohammad Tehranipoor
    Pages 295-322

  12. EDA Solution for Power-Aware Design-for-Test

    • Mokhtar Hirech
    Pages 323-353

  13. Back Matter

    Pages 355-363
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Editors and Affiliations

  • de Robotique de Microélectronique de, LIRMM - Laboratoire d'Informatique, Montpellier, France

    Patrick Girard

  • Dept. Electrical &, McMaster University, Hamilton, Canada

    Nicola Nicolici

  • Dept. Computer Science & Electronics, Kyushu Institute of Technology, Iizuka, Japan

    Xiaoqing Wen

Bibliographic Information

  • Book Title: Power-Aware Testing and Test Strategies for Low Power Devices

  • Editors: Patrick Girard, Nicola Nicolici, Xiaoqing Wen

  • DOI: https://doi.org/10.1007/978-1-4419-0928-2

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer-Verlag US 2010

  • Hardcover ISBN: 978-1-4419-0927-5Published: 23 November 2009

  • Softcover ISBN: 978-1-4899-8313-8Published: 05 September 2014

  • eBook ISBN: 978-1-4419-0928-2Published: 11 March 2010

  • Edition Number: 1

  • Number of Pages: XXI, 363

  • Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design

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