Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers
Roermund, Arthur H.M. van, Steyaert, Michiel, Huijsing, Johan (Eds.)
2003, VIII, 396 p.
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This book contains the revised and extended tutorials that 18 experts have presented at the workshop on Advances in Analog Circuit Design (AACD) held at 15-17 April 2003, in Graz, Austria. The book comprises three parts, one per topic, each with 6 tutorial contributions. The three topics are: Fractional-N Synthesis; Design for Robustness; Line and Bus Drivers. Each topic is introduced with a foreword by the chairman of the day, respectively Arthur van Roermund, Michiel Steyaert, and Han Huijsing. Together, they form the permanent program committee of AACD. The local organising committee of the workshop was formed this year by Herbert Grünbacher (workshop chairman) from Carinthia Tech Institute, Villach, Austria; Wolfgang Pribyl from Austriamicrosystems; and Franz Dielacher from Infineon Technologies. This book is number 12 in the series called Analog Circuit Design. The topics discussed in previous issues are: AACD 2002 Spa (Belgium) Structured Mixed-Mode Design Multi-Bit Sigma-Delta Converters Short-Range RF Circuits AACD 2001 Noordwijk (The Netherlands) Scalable Analog Circuits High-Speed D/A Converters RF Power Amplifiers AACD 2000 Munich (Germany) High-Speed A/D Converters Mixed-Signal Design PLLs and Synthesizers AACD 1999 Nice (France) XDSL and Other Communication Systems RF-MOST Models and Behavioural Modelling Integrated Filters and Oscillators viii AACD 1998 Copenhagen (Denmark) 1-Volt Electronics Mixed-Mode Systems LNAs and RF Power Amps for Telecom AACD 1997 Como (Italy) RF A/D Converters Sensor and Actuator Interfaces Low-Noise Oscillators, PLLs and Synthesizers AACD 1996 Lausanne (Swiss) RF CMOS Circuit Design Bandpass SD and Other Converters Translinear Circuits AACD 1995 Villach (Austria) Low Noise/Power/Voltage
Content Level »Research
Keywords »CMOS - Phase - Signal - Standard - analog - analog circuit design - analog design - electromagnetic compatibility - integrated circuit - simulation
Part I: Fractional-N-Synthesis; A. van Roermund. Practical Design Aspects in Fractional-N-Synthesis; W. Rhee. Design and Simulation of Fractional-N-Frequency Synthesizers; M. Perott. Monolithic CMOS Fractional-N-Frequency Synthesizer Design for High Spectral Purity; B. De Muer, M. Steyaert. A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional Synthesizer with 35Hz Frequency Step and Quantization Noise Compensation; I. Bietti, G. Albasini, E. Temporiti, R. Castello. Implementation Aspects of Fractional-N Techniques in Cellular Handsets; Y. Le Guillou, D. Brunel. Fractional-N Phase Locked Loops and its Application in the GSM System; G. Märzinger, B. Neurauter.
Part II: Design for Robustness; M. Steyaert. ESD for Analogue Circuit Design; D. Clarke, A. Righter. ESD in Smart Power Processes; G. Croce, A. Andreini, L. Cerati, G. Meneghesso, L. Sponton. RF-ESD Co-Design for High-Performance CMOS LNAs; P. Leroux, M. Steyaert. Improvement of System Robustness through EMC Optimization; B. Deutschmann. Robustness in Analog Design; M. De Mey. Minimizing Undesired Coupling and Interaction in Mixed Signal ICs; T.J. Schmerbeck.
Part III: Line and Bus Drivers J. Huijsing. Looking to/for Low Power ADSL Drivers in the DSLAM; E. Moons. Class-AB Low-Distortion Drivers for ADSL; T. Ferianz. Class D Self-Oscillating Line Drivers; T. Piessens, M. Steyaert. Class G/H Line Drivers for xDSL; J. Pierdomenico. The USB 2.0 Physical Layer: Standard and Implementation; G. den Besten. Backplane Transceivers; K. Tam, W. Ellersick, R. Soenneker.