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Engineering - Circuits & Systems | Sigma Delta A/D Conversion for Signal Conditioning

Sigma Delta A/D Conversion for Signal Conditioning

Philips, Kathleen, van Roermund, Arthur

2006, X, 227 p.

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This book addresses the application of continuous-time SigmaDelta A/D converters in receivers for a.o. wireless communication. In particular, it focuses on their assets for digitizing such channels.

It gives an overview of SigmaDelta design and of the challenges for future realizations, and provides an understanding of the fundamental power efficiency of SigmaDelta converters. In addition, it presents an analysis of the power consumption in the decimation filter.

Understanding these power/performance trade-offs, it becomes clear that straight-forward digitization of a conditioning channel, i.e. exchanging analog for digital conditioning, comes at a major power penalty.

Furthermore, the book proposes an alternative vision on digitization: because of its inherent immunity to interferers, part of the signal conditioning can be integrated into the continuous-time SigmaDelta A/D converter. This approach results in a major improvement of the power/performance balance of the entire channel.

The book is essential reading for mixed-signal and RF designers who want to familiarize with the basics of SigmaDelta design. For the experienced designer and for

Content Level » Research

Keywords » Bluetooth - CMOS - communication - consumption - filter - integrated circuit - single-electron transistor

Related subjects » Circuits & Systems - Electronics & Electrical Engineering - Mechanical Engineering

Table of contents 

List of symbols and abbreviations

1 Introduction

1.1 Background

1.1.1 Anelectronicsystem

1.1.2 Digital signalprocessing

1.1.3 Digitizationof signal conditioning

1.1.4 Digitization of inter-die interfaces

1.2 Aim of this thesis

1.3 Scope

1.3.1 BasebandA/Dconditioning channels

1.3.2 Continuous-time single-bit sigma-delta conversion

1.3.3 CMOS technology

1.3.4 Power consumptionas cost parameter

1.3.5 Performance parameters

1.4 Outline

2 The signal conditioning channel

2.1 Generic communication channel

2.2 Performance parameters

2.3 Conventional conditioning channels

2.4 Evolution

2.4.1 Technology advances

2.4.2 Systemdemands

2.4.3 Advances in digital signal processing and analog circuit design

2.4.4 Digitizationof the architecture

2.5 Nomenclature

2.6 Conclusions

3 Sigma delta A/D conversion

3.1 Historical overview

3.2 State-of-the-art in sigma delta A/D conversion

3.2.1 Architectural considerations

3.2.2 Implementation aspects

3.2.3 Performance metrics for sigma delta ADCs

3.3 sigma delta ADCs infuture conditioning channels

3.3.1 The Shannon theorem and sigma delta based signal conditioning

3.3.2 Comparison of Nyquist and sigma delta based signal conditioning

3.3.3 Survey of published power/performance values

3.4 Limitations of sigma delta A/D conversion

3.4.1 Linear limitations

3.4.2 Non-linear limitations

3.5 Conclusions

4 Power consumption in channel building blocks

4.1 Literature on power/performance analysis

4.2 Figures-of-merit

4.2.1 FOM related to thermal noise

4.2.2 FOMincluding distortion

4.2.3 FOM related to signal resolution

4.3 Power consumption in analog conditioning circuits

4.3.1 Power/performance relations

4.3.2 Discussion

4.4 Power consumption in a sigma delta ADC

4.4.1 Power/performance relations

4.4.2 Discussion

4.5 Power consumption in digital conditioning circuits

4.5.1 Filter functions

4.5.2 Power/performancerelations

4.5.3 Discussion

4.6 Comparison

4.7 Conclusions

5 Full-analog and full-digital conditioning channels

5.1 Full-analog conditioning channel

5.1.1 The conditioning channel

5.2 Full-digital conditioning channel

5.2.1 The conditioning channel

5.2.2 Power/performance analysis

5.3 Conclusions

6 Conditioning sigma delta ADCs

6.1 Generic conditioning sigma delta ADC

6.1.1 Conceptofoperation

6.1.2 Universal model of a sigma delta modulator

6.1.3 Interferer immunity

6.1.4 Power/performance analysis

6.2 Signal conditioning in the decimation filter

6.2.1 Interferer immunity

6.2.2 The conditioning channel

6.2.3 Power/performance analysis

6.3 Signal conditioning with a restricted filtering STF

6.3.1 Interferer immunity

6.3.2 The conditioning channel

6.3.3 Power/performance analysis

6.3.4 Conditioning hybrid sigma delta ADC

6.4 Signal conditioningbyunrestrictedSTFdesign

6.4.1 Interferer immunity

6.4.2 The conditioningchannel

6.4.3 Power/performanceanalysis

6.5 Comparisonof conditioningADCs

6.5.1 Comparison of topologies

6.5.2 Flexibility

6.5.3 Power consumption

6.5.4 Guidelines

6.6 Conclusions

7 Digitization of the inter-die interface

7.1 Considerations

7.2 Power inthe interface

7.2.1 Analoginterface

7.2.2 Digital interface after decimation

7.2.3 Digital interface before decimation

7.2.4 Comparison

7.3 Application to the conditioning channels

7.4 Conclusions

8 Highly analog and highly digital channels for FM/AM radio

8.1 System

8.1.1 Conventional radio with analog demodulation

8.1.2 Radio with digital demodulation

8.2 VGAdesign

8.2.1 HighlylinearVGAdesign

8.2.2 Evaluation

8.3 ADCdesign

8.3.1 Conventionalsolutions

8.3.2 sigma delta ADC with integrated passive mixer

8.3.3 Evaluation

8.4 Evaluationof the channel

8.4.1 Discussion

8.4.2 Benchmark

8.5 Conclusions

9 Conditioning sigma delta ADCs for Bluetooth

9.1 System

9.1.1 Conventional radio with analog demodulation

9.1.2 Radio with digital demodulation and analog signal-conditioning

9.1.3 Radio with digital demodulation, without analog signal conditioning

9.2 Feed forward sigma delta ADC

9.2.1 Design

9.2.2 Evaluation

9.3 Conditioning feedback sigma deltaADC

9.3.1 Design

9.3.2 Evaluation

9.4 FFB-ADC

9.4.1 Design

9.4.2 Evaluation

9.5 Evaluationof the channels

9.5.1 Benchmark with published ADCs

9.5.2 Comparison of the presented ADCs

9.5.3 Benchmark with published Bluetooth conditioning channels

9.6 Conclusions

10 General conclusions

A Overview of published sigma delta ADCs

B Power/performance relation of analog circuits

B.1 Simple differential pair

B.2 Differentialpair in aglobal feed-back configuration

B.3 Degenerated differential pair

C Power/performance relation of digital filters

C.1 Analysis of the filter topology

C.2 Calculation of filter parameters

C.3 Calculation of powerc onsumption

C.4 Extensionto other implementations

D Third-order distortion in analog circuits and sigma delta ADCs

E Power consumption in a data interface.

E.1 Analogdata interface.

E.2 Digital data interface

References

Original contributions

List of publications

Summary

Samenvatting

Dankwoord

Biography

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