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Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed.
To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced.
The first application shows how the sub-binary M/2+M structure can be employed as a conventional digital-to-analog converter if two calibration and radix conversion algorithms are implemented.
The second application, a SOI 1T DRAM, is then presented. A digital algorithm chooses a suitable reference value that compensates several circuit imperfections together, from the sense amplifier offset to the dispersion of the memory read currents.
The third application is the calibration of the sensitivity of a current measurement microsystem based on a Hall magnetic field sensor. Using a variant of the chopper modulation, the spinning current technique, combined with a second modulation of a reference signal, the sensitivity of the complete system is continuously measured without interrupting normal operation. A thermal drift lower than 50 ppm/°C is achieved, which is 6 to 10 times less than in state-of-the-art implementations. Furthermore, the calibration technique also compensates drifts due to mechanical stresses and ageing.
Content Level »Research
Keywords »Analog Circuits and Systems - DRAM - Hall sensors - Mixed-mode circuit design - Offset Cancellation (Chopper/Autozero) - RAM - SECS - Sub-binary DACs - Transistor
List of Figures. List of Tables.
1 Introduction. 1.1 Context. 1.2 Objectives. 1.3 Compensation methodology. 1.4 Applications of the compensation methodology. 1.5 Book organization.
2 Autocalibration and compensation techniques. 2.1 Introduction. 2.2 Matching. 2.3 Chopper stabilization. 2.4 Autozero. 2.5 Correlated double sampling. 2.6 Ping-pong. 2.7 Other techniques. 2.8 Classification. 2.9 Conclusion.
3 Digital compensation circuits and sub-binary digital-to-analog converters. 3.1 Introduction. 3.2 Digital compensation. 3.3 Successive approximations. 3.4 Sub-binary radix DACs. 3.5 Component arrays. 3.6 Current sources. 3.7 R/2R ladders. 3.8 Linear current division using MOS transistors. 3.9 M/2M ladders. 3.10 R/xR ladders. 3.11 M/2+M ladders. 3.12 Comparison. 3.13 Linear DACs based on M/2+M converters. 3.14 Conclusion.
4 Methodology for current-mode digital compensation of analog circuits. 4.1 Introduction. 4.2 Two-stage Miller operational amplifier. 4.3 Compensation current technique. 4.4 Simulation with digital compensation circuits. 4.5 Application to SOI 1T DRAM calibration. 4.6 Conclusion.
5 Hall microsystem with continuous digital gain calibration. 5.1 Introduction. 5.2 Integrated Hall sensors. 5.3 Spinning current technique. 5.4 Sensitivity calibration of Hall sensors. 5.5 Hall sensor microsystems. 5.6 Continuous digital gain calibration technique. 5.7 Conclusion.
6 Implementation of the Hall microsystem with continuous calibration. 6.1 Introduction. 6.2 Hall sensor array. 6.3 Preamplifier. 6.4 Demodulators. 6.5 Delta-sigma modulator. 6.6 System improvements. 6.7 System integration. 6.8 Conclusion.
7 Conclusion. 7.1 Highlights. 7.2 Main contributions. 7.3 Perspectives.