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Design for AT-Speed Test, Diagnosis and Measurement

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  • © 2000

Overview

Part of the book series: Frontiers in Electronic Testing (FRET, volume 15)

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Table of contents (8 chapters)

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About this book

Design for AT-Speed Test, Diagnosis and Measurement is the first book to offer practical and proven design-for-testability (DFT) solutions to chip and system design engineers, test engineers and product managers at the silicon level as well as at the board and systems levels. Designers will see how the implementation of embedded test enables simplification of silicon debug and system bring-up. Test engineers will determine how embedded test provides a superior level of at-speed test, diagnosis and measurement without exceeding the capabilities of their equipment. Product managers will learn how the time, resources and costs associated with test development, manufacture cost and lifecycle maintenance of their products can be significantly reduced by designing embedded test in the product. A complete design flow and analysis of the impact of embedded test on a design makes this book a `must read' before any DFT is attempted.

Editors and Affiliations

  • Logic Vision, Inc., USA

    Benoit Nadeau-Dostie

Bibliographic Information

  • Book Title: Design for AT-Speed Test, Diagnosis and Measurement

  • Editors: Benoit Nadeau-Dostie

  • Series Title: Frontiers in Electronic Testing

  • DOI: https://doi.org/10.1007/b117472

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer Science+Business Media New York 2000

  • Hardcover ISBN: 978-0-7923-8669-8Published: 30 September 1999

  • Softcover ISBN: 978-1-4757-8291-2Published: 26 April 2013

  • eBook ISBN: 978-0-306-47544-3Published: 11 April 2006

  • Series ISSN: 0929-1296

  • Edition Number: 1

  • Number of Pages: XVII, 239

  • Topics: Circuits and Systems, Electrical Engineering

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