Logo - springer
Slogan - springer

Engineering - Circuits & Systems | Architecture and CAD for Deep-Submicron FPGAS

Architecture and CAD for Deep-Submicron FPGAS

Betz, Vaughn, Rose, Jonathan, Marquardt, Alexander

1999, XI, 247 p.

Available Formats:
eBook
Information

Springer eBooks may be purchased by end-customers only and are sold without copy protection (DRM free). Instead, all eBooks include personalized watermarks. This means you can read the Springer eBooks across numerous devices such as Laptops, eReaders, and tablets.

You can pay for Springer eBooks with Visa, Mastercard, American Express or Paypal.

After the purchase you can directly download the eBook file or read it online in our Springer eBook Reader. Furthermore your eBook will be stored in your MySpringer account. So you can always re-download your eBooks.

 
$349.00

(net) price for USA

ISBN 978-1-4615-5145-4

digitally watermarked, no DRM

Included Format: PDF

download immediately after purchase


learn more about Springer eBooks

add to marked items

Hardcover
Information

Hardcover version

You can pay for Springer Books with Visa, Mastercard, American Express or Paypal.

Standard shipping is free of charge for individual customers.

 
$439.00

(net) price for USA

ISBN 978-0-7923-8460-1

free shipping for individuals worldwide

usually dispatched within 3 to 5 business days


add to marked items

Softcover
Information

Softcover (also known as softback) version.

You can pay for Springer Books with Visa, Mastercard, American Express or Paypal.

Standard shipping is free of charge for individual customers.

 
$439.00

(net) price for USA

ISBN 978-1-4613-7342-1

free shipping for individuals worldwide

usually dispatched within 3 to 5 business days


add to marked items

Since their introduction in 1984, Field-Programmable Gate Arrays (FPGAs) have become one of the most popular implementation media for digital circuits and have grown into a $2 billion per year industry. As process geometries have shrunk into the deep-submicron region, the logic capacity of FPGAs has greatly increased, making FPGAs a viable implementation alternative for larger and larger designs. To make the best use of these new deep-submicron processes, one must re-design one's FPGAs and Computer- Aided Design (CAD) tools.
Architecture and CAD for Deep-Submicron FPGAs addresses several key issues in the design of high-performance FPGA architectures and CAD tools, with particular emphasis on issues that are important for FPGAs implemented in deep-submicron processes.
Three factors combine to determine the performance of an FPGA: the quality of the CAD tools used to map circuits into the FPGA, the quality of the FPGA architecture, and the electrical (i.e. transistor-level) design of the FPGA. Architecture and CAD for Deep-Submicron FPGAs examines all three of these issues in concert.
In order to investigate the quality of different FPGA architectures, one needs CAD tools capable of automatically implementing circuits in each FPGA architecture of interest. Once a circuit has been implemented in an FPGA architecture, one next needs accurate area and delay models to evaluate the quality (speed achieved, area required) of the circuit implementation in the FPGA architecture under test. This book therefore has three major foci: the development of a high-quality and highly flexible CAD infrastructure, the creation of accurate area and delay models for FPGAs, and the study of several important FPGA architectural issues.
Architecture and CAD for Deep-Submicron FPGAs is an essential reference for researchers, professionals and students interested in FPGAs.

Content Level » Research

Keywords » FPGA - Field Programmable Gate Array - architecture - computer - computer-aided design (CAD) - development - gate array - geometry - logic - modeling - transistor - visualization

Related subjects » Circuits & Systems - Electronics & Electrical Engineering - Information Systems and Applications

Table of contents 

1. Introduction. 2. Background and Previous Work. 3. CAD Tools: Packing and Placement. 4. Routing Tools and Routing Architecture Generation. 5. Global Routing Architecture. 6. Cluster-Based Logic Blocks. 7. Detailed Routing Architecture. 8. Conclusions and Future Work. Appendix A: Graphic Visualization in VPR. Appendix B: FPGA Circuitry and Process Modeling. Appendix C: Sizing of Routing Transistors and Metal. References. Index.

Popular Content within this publication 

 

Articles

Read this Book on Springerlink

Services for this book

New Book Alert

Get alerted on new Springer publications in the subject area of Circuits and Systems.