Authors:
- Provides a reference for engineers in the field of static timing analysis for semiconductors
- Discusses the underlying theoretical background as well as in-depth coverage of timing verification using static timing analysis
- Covers topics such as CMOS logic gates, cell library, timing arcs, waveform slew, and cell capacitance, among others
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Table of contents (10 chapters)
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Front Matter
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Back Matter
About this book
Bibliographic Information
Book Title: Static Timing Analysis for Nanometer Designs
Book Subtitle: A Practical Approach
Authors: Rakesh Chadha, J. Bhasker
DOI: https://doi.org/10.1007/978-0-387-93820-2
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer-Verlag US 2009
Hardcover ISBN: 978-0-387-93819-6Published: 17 April 2009
Softcover ISBN: 978-1-4419-4715-4Published: 08 September 2011
eBook ISBN: 978-0-387-93820-2Published: 03 April 2009
Edition Number: 1
Number of Pages: XX, 572
Number of Illustrations: 225 b/w illustrations
Topics: Circuits and Systems, Electronics and Microelectronics, Instrumentation, Computer-Aided Engineering (CAD, CAE) and Design