Skip to main content
Book cover

Predictive Technology Model for Robust Nanoelectronic Design

  • Book
  • © 2011

Overview

  • Provides a systematic treatment of predictive modeling and design prototyping, from the fundamental concept to practical benchmarks
  • Includes a complete and quantitative vision on the opportunities and limits of technology scaling toward the 10nm regime Addresses the emergent modeling and design needs under ever-increasing variability and reliability concerns
  • Covers state-of-the-art compact modeling solutions for CMOS alternatives and post-silicon devices, enabling exploratory design activities beyond traditional CMOS Discusses the seamless integration of the process/materials development and circuit simulation that supports concurrent technology-design research
  • Includes supplementary material: sn.pub/extras

Part of the book series: Integrated Circuits and Systems (ICIR)

This is a preview of subscription content, log in via an institution to check access.

Access this book

eBook USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (10 chapters)

Keywords

About this book

Predictive Technology Model for Robust Nanoelectronic Design explains many of the technical mysteries behind the Predictive Technology Model (PTM) that has been adopted worldwide in explorative design research. Through physical derivation and technology extrapolation, PTM is the de-factor device model used in electronic design. This work explains the systematic model development and provides a guide to robust design practice in the presence of variability and reliability issues. Having interacted with multiple leading semiconductor companies and university research teams, the author brings a state-of-the-art perspective on technology scaling to this work and shares insights gained in the practices of device modeling. 

Authors and Affiliations

  • , School of ECEE, Arizona State University, Tempe, USA

    Yu Cao

Bibliographic Information

Publish with us