Overview
- Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect
- Describes design techniques to mitigate problems caused by variation
- Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance
Part of the book series: Analog Circuits and Signal Processing (ACSP)
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Table of contents (8 chapters)
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Front Matter
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Back Matter
Keywords
About this book
Authors and Affiliations
About the author
Bibliographic Information
Book Title: Variation Tolerant On-Chip Interconnects
Authors: Ethiopia Enideg Nigussie
Series Title: Analog Circuits and Signal Processing
DOI: https://doi.org/10.1007/978-1-4614-0131-5
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media, LLC 2012
Hardcover ISBN: 978-1-4614-0130-8Published: 01 December 2011
Softcover ISBN: 978-1-4899-9086-0Published: 03 March 2014
eBook ISBN: 978-1-4614-0131-5Published: 02 December 2011
Series ISSN: 1872-082X
Series E-ISSN: 2197-1854
Edition Number: 1
Number of Pages: XII, 172
Topics: Circuits and Systems, Electronics and Microelectronics, Instrumentation, Nanotechnology and Microengineering