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Nanoscale Memory Repair

  • Book
  • © 2011

Overview

Authors:
  1. Masashi Horiguchi

    1. Renesas Electronics Corporation, Kodaira-shi, Tokyo, Japan

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  2. Kiyoo Itoh

    1. Central Research Laboratory, Hitachi Ltd., Kokubunji-shi, Tokyo, Japan

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    You can also search for this author in PubMed   Google Scholar

  • Presents the first comprehensive reference to reliability and repair techniques for nano-scale memories
  • Covers both the mathematical foundations and engineering applications of yield and reliability in nano-scale memories
  • Includes a variety of practical circuits and logic, critical for higher yield and reliability, which have been proven successful during the authors’ extensive experience in developing memories and low-voltage CMOS circuits
  • Includes supplementary material: sn.pub/extras

Part of the book series: Integrated Circuits and Systems (ICIR)

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Table of contents (6 chapters)

  1. Front Matter

    Pages i-ix
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  2. An Introduction to Repair Techniques

    • Masashi Horiguchi, Kiyoo Itoh
    Pages 1-17

  3. Redundancy

    • Masashi Horiguchi, Kiyoo Itoh
    Pages 19-67

  4. Error Checking and Correction (ECC)

    • Masashi Horiguchi, Kiyoo Itoh
    Pages 69-137

  5. Combination of Redundancy and Error Correction

    • Masashi Horiguchi, Kiyoo Itoh
    Pages 139-155

  6. Reduction Techniques for Margin Errors of Nanoscale Memories

    • Masashi Horiguchi, Kiyoo Itoh
    Pages 157-201

  7. Reduction Techniques for Speed-Relevant Errors of Nanoscale Memories

    • Masashi Horiguchi, Kiyoo Itoh
    Pages 203-212

  8. Back Matter

    Pages 213-215
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Keywords

About this book

Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. This book systematically describes these yield and reliability issues in terms of mathematics and engineering, as well as an array of repair techniques, based on the authors’ long careers in developing memories and low-voltage CMOS circuits. Nanoscale Memory Repair gives a detailed explanation of the various yield models and calculations, as well as various, practical logic and circuits that are critical for higher yield and reliability.

Authors and Affiliations

  • Renesas Electronics Corporation, Kodaira-shi, Tokyo, Japan

    Masashi Horiguchi

  • Central Research Laboratory, Hitachi Ltd., Kokubunji-shi, Tokyo, Japan

    Kiyoo Itoh

Bibliographic Information

  • Book Title: Nanoscale Memory Repair

  • Authors: Masashi Horiguchi, Kiyoo Itoh

  • Series Title: Integrated Circuits and Systems

  • DOI: https://doi.org/10.1007/978-1-4419-7958-2

  • Publisher: Springer New York, NY

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science+Business Media, LLC 2011

  • Hardcover ISBN: 978-1-4419-7957-5Published: 13 January 2011

  • Softcover ISBN: 978-1-4614-2794-0Published: 24 February 2013

  • eBook ISBN: 978-1-4419-7958-2Published: 11 January 2011

  • Series ISSN: 1558-9412

  • Series E-ISSN: 1558-9420

  • Edition Number: 1

  • Number of Pages: X, 218

  • Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design

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