Fine- and Coarse-Grain Reconfigurable Computing

Fine- and Coarse-Grain Reconfigurable Computing gives the basic concepts and building blocks for the design of Fine- (or FPGA) and Coarse-Grain Reconfigurable Architectures. Recently-developed integrated architecture design and software-supported design flow of FPGA and coarse-grain reconfigurable architecture are also described. Part I consists of two extensive surveys of FPGA and Coarse-Grain Reconfigurable Architectures. In Part II, case studies, innovative research results about reconfigurable architectures and design frameworks from three projects AMDREL, MOLEN and ADRES and DRESC, and, a new classification according to microcoded architectural criteria are described. Fine- and Coarse-Grain Reconfigurable Computing is an essential reference for researchers and professionals and can be used as a textbook by undergraduate, graduate students and professors.

• CAD Design Flow
• FPGA
• Field Programmable Gate Array
• Hardware
• architecture
• classification
• compiler
• computer
• computer science
• configuration
• design
• integrated circuit
• interconnect
• logic
• software

• Technical University Delft, The Netherlands

  Stamatis Vassiliadis

• Democritus University of Thrace

  Dimitrios Soudris

S. Vassiliadis, Professor at Department of Computer Engineering at the TU Delft in The Netherlands is well known in the Reconfigurable Computing community.

D. Soudris, Professor at Department of Electrical and Computer Engineering at the Democritus University of Thrace in Greece is a successful Kluwer author

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