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  • © 1997

Reasoning in Boolean Networks

Logic Synthesis and Verification Using Testing Techniques

Part of the book series: Frontiers in Electronic Testing (FRET, volume 9)

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Table of contents (7 chapters)

  1. Front Matter

    Pages i-xv
  2. Preliminaries

    • Wolfgang Kunz, Dominik Stoffel
    Pages 1-15
  3. Combinational ATPG

    • Wolfgang Kunz, Dominik Stoffel
    Pages 17-47
  4. Recursive Learning

    • Wolfgang Kunz, Dominik Stoffel
    Pages 49-73
  5. AND/OR Reasoning Graphs

    • Wolfgang Kunz, Dominik Stoffel
    Pages 75-99
  6. Logic Optimization

    • Wolfgang Kunz, Dominik Stoffel
    Pages 101-161
  7. Logic Verification

    • Wolfgang Kunz, Dominik Stoffel
    Pages 163-195
  8. Conclusions and Future Work

    • Wolfgang Kunz, Dominik Stoffel
    Pages 197-199
  9. Back Matter

    Pages 201-230

About this book

Reasoning in Boolean Networks provides a detailed treatment of recent research advances in algorithmic techniques for logic synthesis, test generation and formal verification of digital circuits. The book presents the central idea of approaching design automation problems for logic-level circuits by specific Boolean reasoning techniques.
While Boolean reasoning techniques have been a central element of two-level circuit theory for many decades Reasoning in Boolean Networks describes a basic reasoning methodology for multi-level circuits. This leads to a unified view on two-level and multi-level logic synthesis. The presented reasoning techniques are applied to various CAD-problems to demonstrate their usefulness for today's industrially relevant problems.
Reasoning in Boolean Networks provides lucid descriptions of basic algorithmic concepts in automatic test pattern generation, logic synthesis and verification and elaborates their intimate relationship to provide further intuition and insight into the subject. Numerous examples are provide for ease in understanding the material.
Reasoning in Boolean Networks is intended for researchers in logic synthesis, VLSI testing and formal verification as well as for integrated circuit designers who want to enhance their understanding of basic CAD methodologies.

Authors and Affiliations

  • University of Potsdam, Germany

    Wolfgang Kunz, Dominik Stoffel

Bibliographic Information

  • Book Title: Reasoning in Boolean Networks

  • Book Subtitle: Logic Synthesis and Verification Using Testing Techniques

  • Authors: Wolfgang Kunz, Dominik Stoffel

  • Series Title: Frontiers in Electronic Testing

  • DOI: https://doi.org/10.1007/978-1-4757-2572-8

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer-Verlag US 1997

  • Hardcover ISBN: 978-0-7923-9921-6Published: 30 June 1997

  • Softcover ISBN: 978-1-4419-5176-2Published: 07 December 2010

  • eBook ISBN: 978-1-4757-2572-8Published: 09 March 2013

  • Series ISSN: 0929-1296

  • Edition Number: 1

  • Number of Pages: XVI, 230

  • Topics: Computer-Aided Engineering (CAD, CAE) and Design, Electrical Engineering

Buy it now

Buying options

eBook USD 129.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access