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Computer Science - Hardware | Computer Arithmetic - Algorithms and Hardware Implementations

Computer Arithmetic

Algorithms and Hardware Implementations

Vlăduţiu, Mircea

2012, VI, 270 p.

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  • Provides a unified procedure for building the link between the arithmetic algorithms and digital design
  • Acquaints the reader with the digital design down to the gate level for the matrix/combinational arithmetic structures
  • Additional sections extend the adder and multiplier designs to discuss reliability issues

The subject of this book is the analysis and design of digital devices that implement computer arithmetic. The book's presentation of high-level detail, descriptions, formalisms and design principles means that it can support many research activities in this field, with an emphasis on bridging the gap between algorithm optimization and hardware implementation. The author provides a unified view linking the domains of digital design and arithmetic algorithms, based on original formalisms and hardware description languages.

A feature of the book is the large number of examples and the implementation details provided. While the author does not avoid high-level details, providing for example gate-level designs for all matrix/combinational arithmetic structures.

The book is suitable for researchers and students engaged with hardware design in computer science and engineering.

Content Level » Upper undergraduate

Keywords » Divider synthesis - Fixed point computer architecture - Floating point computer architecture - Robust adder synthesis - Robust multiplier synthesis

Related subjects » Communication Networks - Electronics & Electrical Engineering - Hardware

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