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Integrated Modeling of Chemical Mechanical Planarization for Sub-Micron IC Fabrication

From Particle Scale to Feature, Die and Wafer Scales

  • Book
  • © 2004

Overview

Authors:
  1. Jianfeng Luo

    1. R & D Cypress Semiconductor, San Jose, USA

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  2. David A. Dornfeld

    1. Dept. Mechanical Engineering, University of California at Berkeley, Berkeley, USA

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    You can also search for this author in PubMed   Google Scholar

  • First book dedicated to the modeling of CMP for sub-micron integrated circuit (IC) fabrication
  • Modeling and simulation are critical to transfer CMP from an engineering ‘art’ to an engineering ‘science’

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Table of contents (9 chapters)

  1. Front Matter

    Pages I-XXIV
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  2. Introduction

    • Jianfeng Luo, David A. Dornfeld
    Pages 1-13

  3. Review of CMP Modeling

    • Jianfeng Luo, David A. Dornfeld
    Pages 15-52

  4. Material Removal Mechanism in CMP: A Comprehensive Model of Abrasive Particle, Pad Asperity and Wafer Interactions

    • Jianfeng Luo, David A. Dornfeld
    Pages 53-95

  5. Effects of Abrasive Size Distribution in CMP

    • Jianfeng Luo, David A. Dornfeld
    Pages 97-113

  6. Material Removal Regions in CMP: Coupling Effects of Slurry Chemicals, Abrasive Particle Size Distribution and Wafer-Pad Contact Area

    • Jianfeng Luo, David A. Dornfeld
    Pages 115-145

  7. One and Semi-Two Dimensional Feature- and Die-Scale Modeling for the Damascene Process

    • Jianfeng Luo, David A. Dornfeld
    Pages 147-235

  8. Three-Dimensional Feature-Scale Modeling of CMP

    • Jianfeng Luo, David A. Dornfeld
    Pages 237-254

  9. Wafer-Scale Modeling of CMP

    • Jianfeng Luo, David A. Dornfeld
    Pages 255-284

  10. Summary and Future Work

    • Jianfeng Luo, David A. Dornfeld
    Pages 285-295

  11. Back Matter

    Pages 297-311
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Keywords

About this book

Chemical mechanical planarization, or chemical mechanical polishing as it is simultaneously referred to, has emerged as one of the critical processes in semiconductor manufacturing and in the production of other related products and devices, MEMS for example. Since its introduction some 15+ years ago CMP, as it is commonly called, has moved steadily into new and challenging areas of semiconductor fabrication. Demands on it for consistent, efficient and cost-effective processing have been steady. This has continued in the face of steadily decreasing feature sizes, impressive increases in wafer size and a continuing array of new materials used in devices today. There are a number of excellent existing references and monographs on CMP in circulation and we defer to them for detailed background information. They are cited in the text. Our focus here is on the important area of process mod­ els which have not kept pace with the tremendous expansion of applications of CMP. Preston's equation is a valuable start but represents none of the subtleties of the process. Specifically, we refer to the development of models with sufficient detail to allow the evaluation and tradeoff of process inputs and parameters to assess impact on quality or quantity of production. We call that an "integrated model" and, more specifically, we include the important role of the mechanical elements of the process.

Authors and Affiliations

  • R & D Cypress Semiconductor, San Jose, USA

    Jianfeng Luo

  • Dept. Mechanical Engineering, University of California at Berkeley, Berkeley, USA

    David A. Dornfeld

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