Overview
- Authors:
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Chrysostomos Nicopoulos
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Dept. Electrical & Computer Engineering, University of Cyprus, Nicosia, Cyprus
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Vijaykrishnan Narayanan
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Dept. Computer Science & Engineering, Pennsylvania State University, University Park, U.S.A.
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Chita R. Das
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Dept. Computer Science & Engineering, Pennsylvania State University, University Park, U.S.A.
- A comprehensive study of Network-on-Chip architectures for multi-core chips
- Analysis of complex interplay between various design evaluation metrics
- Detailed look at both macro- and micro-architectural design issues
- Innovative solutions for increased reliability and process variability tolerance
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Table of contents (11 chapters)
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MICRO-Architectural Exploration
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 1-12
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 13-16
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 19-40
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 41-64
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 65-92
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 93-115
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MACRO-Architectural Exploration
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Front Matter
Pages 118-118
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 119-146
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 147-170
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 171-197
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 199-205
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- Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R. Das
Pages 207-209
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Back Matter
Pages 211-223
About this book
[2]. The Cell Processor from Sony, Toshiba and IBM (STI) [3], and the Sun UltraSPARC T1 (formerly codenamed Niagara) [4] signal the growing popularity of such systems. Furthermore, Intel’s very recently announced 80-core TeraFLOP chip [5] exemplifies the irreversible march toward many-core systems with tens or even hundreds of processing elements. 1.2 The Dawn of the Communication-Centric Revolution The multi-core thrust has ushered the gradual displacement of the computati- centric design model by a more communication-centric approach [6]. The large, sophisticated monolithic modules are giving way to several smaller, simpler p- cessing elements working in tandem. This trend has led to a surge in the popularity of multi-core systems, which typically manifest themselves in two distinct incarnations: heterogeneous Multi-Processor Systems-on-Chip (MPSoC) and homogeneous Chip Multi-Processors (CMP). The SoC philosophy revolves around the technique of Platform-Based Design (PBD) [7], which advocates the reuse of Intellectual Property (IP) cores in flexible design templates that can be customized accordingly to satisfy the demands of particular implementations. The appeal of such a modular approach lies in the substantially reduced Time-To- Market (TTM) incubation period, which is a direct outcome of lower circuit complexity and reduced design effort. The whole system can now be viewed as a diverse collection of pre-existing IP components integrated on a single die.
