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VLSI-SoC: Forward-Looking Trends in IC and Systems Design

18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers

  • Conference proceedings
  • © 2012

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Editors:
  1. José L. Ayala

    1. Computer Science Faculty, Complutense University of Madrid, Madrid, Spain

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  2. David Atienza Alonso

    1. Institute of EE, Embedded Systems Laboratory, École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland

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  3. Ricardo Reis

    1. Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

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Part of the book series: IFIP Advances in Information and Communication Technology (IFIPAICT, volume 373)

Included in the following conference series:

Conference proceedings info: VLSI-SoC 2010.

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Table of contents (14 papers)

  1. Front Matter

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  2. A 1-V CMOS Ultralow-Power Receiver Front End for the IEEE 802.15.4 Standard Using Tuned Passive Mixer Output Pole

    • Aaron V. T. Do, Chirn Chye Boon, Manthena Vamshi Krishna, Anh Manh Do, Kiat Seng Yeo
    Pages 1-21

  3. Self-Timed Rings: A Promising Solution for Generating High-Speed High-Resolution Low-Phase Noise Clocks

    • Oussama Elissati, Sébastien Rieubon, Eslam Yahya, Laurent Fesquet
    Pages 22-42

  4. Adaptive Logical Control of RF LNA Performances for Efficient Energy Consumption

    • Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni
    Pages 43-68

  5. A 1.8-V 3.6-mW 2.4-GHz Fully Integrated CMOS Frequency Synthesizer for the IEEE 802.15.4

    • Manthena Vamshi Krishna, Xuan Jie, Anh Manh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do
    Pages 69-99

  6. Design and Optimization of a Digital Baseband Receiver ASIC for GSM/EDGE

    • Christian Benkeser, Qiuting Huang
    Pages 100-127

  7. VLSI Implementation of Hard- and Soft-Output Sphere Decoding for Wide-Band MIMO Systems

    • Christoph Studer, Markus Wenk, Andreas Burg
    Pages 128-154

  8. Joint Optimization of Low-Power DCT Architecture and Efficient Quantization Technique for Embedded Image Compression

    • Maher Jridi, Ayman Alfalou
    Pages 155-181

  9. Fast Fixed-Point Optimization of DSP Algorithms

    • Gabriel Caffarena, Ángel Fernández-Herrero, Juan A. López, Carlos Carreras
    Pages 182-205

  10. Design and Verification of Lazy and Hybrid Implementations of the SELF Protocol

    • Eliyah Kilada, Kenneth S. Stevens
    Pages 206-232

  11. Adaptation Strategies in Multiprocessors System on Chip

    • Remi Busseuil, Gabriel Marchesan Almeida, Luciano Ost, Sameer Varyani, Gilles Sassatelli, Michel Robert
    Pages 233-257

  12. Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits

    • Hailong Jiao, Volkan Kursun
    Pages 258-290

  13. Fast Legalization for Standard Cell Placement with Simultaneous Wirelength and Displacement Minimization

    • Tsung-Yi Ho, Sheng-Hung Liu
    Pages 291-311

  14. Control Electronics Integration toward Endoscopic Capsule Robot Performing Legged Locomotion and Illumination

    • Oscar Alonso, Angel Diéguez
    Pages 312-338

  15. Smart Camera System-on-Chip Architecture for Real-Time Brush Based Interactive Painting Systems

    • Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Fabian Di Fiore, Frank Van Reeth et al.
    Pages 339-353

  16. Back Matter

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Other volumes

  1. VLSI-SoC: Forward-Looking Trends in IC and Systems Design

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About this book

This book contains extended and revised versions of the best papers presented at the 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, held in Madrid, Spain, in September 2010. The 14 papers included in the book were carefully reviewed and selected from the 52 full papers presented at the conference. The papers cover a wide variety of excellence in VLSI technology and advanced research. They address the current trend toward increasing chip integration and technology process advancements bringing about stimulating new challenges both at the physical and system-design levels, as well as in the test of theses systems.

Editors and Affiliations

  • Computer Science Faculty, Complutense University of Madrid, Madrid, Spain

    José L. Ayala

  • Institute of EE, Embedded Systems Laboratory, École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland

    David Atienza Alonso

  • Instituto de Informática, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

    Ricardo Reis

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