Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing

1. Front Matter

   Pages I-XVII

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2. Invited Keynote

   1. The Rising Wave of Field Programmability

      • Tsugio Makimoto

      Pages 1-6

   2. Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS

      • S. Govindarajan, R. Vemuri

      Pages 7-18

3. Network Processors

   1. A Dynamically Reconfigurable FPGA-Based Content Addressable Memory for Internet Protocol Characterization

      • Johan Ditmar, Kjell Torkelsson, Axel Jantsch

      Pages 19-28

   2. A Compiler Directed Approach to Hiding Configuration Latency in Chameleon Processors

      • Xinan Tang, Manning Aalsma, Raymond Jou

      Pages 29-38

   3. Reconfigurable Network Processors Based on Field Programmable System Level Integrated Circuits

      • Marios Iliopoulos, Theodore Antonakopoulos

      Pages 39-47

   4. Internet Connected FPL

      • Hamish Fallside, Michael J. S. Smith

      Pages 48-57

4. Prototyping

   1. Field Programmable Communication Emulation and Optimization for Embedded System Design

      • Frank-Michael Renner, Jürgen Becker, Manfred Glesner

      Pages 58-67

   2. FPGA-Based Emulation: Industrial and Custom Prototyping Solutions

      • Helena Krupnova, Gabriele Saucier

      Pages 68-77

   3. FPGA-Based Prototyping for Product Definition

      • Rainer Kress, Andreas Pyttel, Alexander Sedlmeier

      Pages 78-86

   4. Implementation of Virtual Circuits by Means of the FIPSOC Devices

      • E. Cantó, J. M. Moreno, J. Cabestany, I. Lacadena, J. M. Insenser

      Pages 87-95

5. Dynamically Reconfigurable I

   1. Static and Dynamic Reconfigurable Designs for a 2D Shape-Adaptive DCT

      • Jörn Gause, Peter Y. K. Cheung, Wayne Luk

      Pages 96-105

   2. A Self-Reconfigurable Gate Array Architecture

      • Reetinder Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna

      Pages 106-120

   3. Multitasking on FPGA Coprocessors

      • H. Simmler, L. Levinson, R. Männer

      Pages 121-130

   4. Design Visualisation for Dynamically Reconfigurable Systems

      • Milan Vasilko

      Pages 131-140

   5. Verification of Dynamically Reconfigurable Logic

      • David Robinson, Patrick Lysaght

      Pages 141-150

6. Miscellaneous I

   1. Design of a Fault Tolerant FPGA

      • T. Bartzick, M. Henze, J. Kickler, K. Woska

      Pages 151-156

   2. Real-Time Face Detection on a Configurable Hardware System

      • Rob McCready

      Pages 157-162

   3. Multifunctional Programmable Single-Board CAN Monitoring Module

      • Petr Pfeifer

      Pages 163-168

   4. Self-Testing of Linear Segments in User-Programmed FPGAs

      • Pawel Tomaszewicz

      Pages 169-174

This book is the proceedings volume of the 10th International Conference on Field Programmable Logic and its Applications (FPL), held August 27 30, 2000 in Villach, Austria, which covered areas like reconfigurable logic (RL), reconfigurable computing (RC), and its applications, and all other aspects. Its subtitle "The Roadmap to Reconfigurable Computing" reminds us, that we are currently witnessing the runaway of a breakthrough. The annual FPL series is the eldest international conference in the world covering configware and all its aspects. It was founded 1991 at Oxford University (UK) and is 2 years older than its two most important competitors usually taking place at Monterey and Napa. FPL has been held at Oxford, Vienna, Prague, Darmstadt, London, Tallinn, and Glasgow (also see: http://www. fpl. uni kl. de/FPL/). The New Case for Reconfigurable Platforms: Converging Media. Indicated by palmtops, smart mobile phones, many other portables, and consumer electronics, media such as voice, sound, video, TV, wireless, cable, telephone, and Internet continue to converge. This creates new opportunities and even necessities for reconfigurable platform usage. The new converged media require high volume, flexible, multi purpose, multi standard, low power products adaptable to support evolving standards, emerging new standards, field upgrades, bug fixes, and, to meet the needs of a growing number of different kinds of services offered to zillions of individual subscribers preferring different media mixes.

• Erfüllbarkeitsproblem der Aussagenlogik
• Hardware
• Interface
• Scheduling
• Standards
• automata
• configware
• evolvable hardware
• field-programmable gate arrays
• formal verification
• hardware design
• microprocessor
• mobile communication
• reconfigurable computing
• system-on-chip development (SoC)

• Computer Science Department, University of Kaiserslautern, Kaiserslautern, Germany

  Reiner W. Hartenstein

• Carinthia Tech Institute, Villach, Austria

  Herbert Grünbacher

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