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High Performance Computing - HiPC 2000

7th International Conference Bangalore, India, December 17-20, 2000 Proceedings

  • Conference proceedings
  • © 2000

Overview

Editors:
  1. Mateo Valero

    1. DAC-UPC,Computer Architecture Department, Technical University of Catalonia, Barcelona, Spain

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  2. Viktor K. Prasanna

    1. Department of EE-Systems Computer Engineering Division, University of Southern California, Los Angeles, USA

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  3. Sriram Vajapeyam

    1. Indian Institute of Science, Bangalore, India

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 1970)

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Table of contents (51 papers)

  1. Front Matter

    Pages I-XVIII
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  2. System Software

    1. Charon Message-Passing Toolkit for Scientific Computations

      • Rob F. Van der Wijngaart
      Pages 3-14

    2. Dynamic Slicing of Concurrent Programs

      • D. Goswami, R. Mall
      Pages 15-26

    3. An Efficient Run-Time Scheme for Exploiting Parallelism on Multiprocessor Systems

      • Tsung-Chuan Huang1, Po-Hsueh Hsu, Chi-Fan Wu
      Pages 27-36

    4. Characterization and Enhancement of Static Mapping Heuristics for Heterogeneous Systems

      • Praveen Holenarsipur, Vladimir Yarmolenko, Jose Duato, D. K. Panda, P. Sadayappan
      Pages 37-48

  3. Algorithms

    1. Optimal Segmented Scan and Simulation of Reconfigurable Architectures on Fixed Connection Networks

      • Alan A. Bertossi, Alessandro Mei
      Pages 51-60

    2. Reducing False Causality in Causal Message Ordering

      • Pranav Gambhire, Ajay D. Kshemkalyani
      Pages 61-72

    3. Working-Set Based Adaptive Protocol for Software Distributed Shared Memory

      • Sung-Woo Lee, Kee-Young Yoo
      Pages 73-82

    4. Evaluation of the Optimal Causal Message Ordering Algorithm

      • Pranav Gambhire, Ajay D. Kshemkalyani
      Pages 83-95

    5. Register Efficient Mergesorting

      • Abhiram Ranade, Sonal Kothari, Raghavendra Udupa
      Pages 96-106

  4. High-Performance Middleware

    1. Applying Patterns to Improve the Performance of Fault Tolerant CORBA

      • Balachandran Natarajan, Aniruddha Gokhale, Shalini Yajnik, Douglas C. Schmidt
      Pages 107-120

    2. Design, Implementation and Performance Evaluation of a High Performance CORBA Group Membership Protocol

      • Shivakant Mishra, Xiao Lin
      Pages 121-130

    3. Analyzing the Behavior of Event Dispatching Systems through Simulation

      • Giovanni Bricconi, Elisabetta Di Nitto, Alfonso Fuggetta, Emma Tracanella
      Pages 131-140

    4. ParAgent: A Domain-Specific Semi-automatic Parallelization Tool

      • S. Mitra, S. C. Kothari, J. Cho, A. Krishnaswamy
      Pages 141-148

    5. Practical Experiences with Java Compilation

      • Todd Smith, Suresh Srinivas, Philipp Tomsich, Jinpyo Park
      Pages 149-157

  5. Applications

    1. Performance Prediction and Analysis of Parallel Out-of-Core Matrix Factorization

      • Eddy Caron, Dominique Lazure, Gil Utard
      Pages 161-172

    2. Integration of Task and Data Parallelism: A Coordination-Based Approach

      • Manuel Díaz, Bartolomé Rubio, Enrique Soler, José M. Troya
      Pages 173-182

    3. Parallel and Distributed Computational Fluid Dynamics: Experimental Results and Challenges

      • M. J. Djomehri, R. Biswas, R. F. Van der Wijngaart, M. Yarrow
      Pages 183-193

    4. Parallel Congruent Regions on a Mesh-Connected Computer

      • Chang-Sung Jeong, Sun-Chul Hwang, Young-Je Woo, Sun-Mi Kim
      Pages 194-203

    5. Can Scatter Communication Take Advantage of Multidestination Message Passing?

      • 1Mohammad Banikazemi, Dhabaleswar K. Panda
      Pages 204-211
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Keywords

About this book

This book constitutes the refereed proceedings of the 7th International Conference on High Performance Computing, HiPC 2000, held in Bangalore, India in December 2000. The 46 revised papers presented together with five invited contributions were carefully reviewed and selected from a total of 127 submissions. The papers are organized in topical sections on system software, algorithms, high-performance middleware, applications, cluster computing, architecture, applied parallel processing, networks, wireless and mobile communication systems, and large scale data mining.

Editors and Affiliations

  • DAC-UPC,Computer Architecture Department, Technical University of Catalonia, Barcelona, Spain

    Mateo Valero

  • Department of EE-Systems Computer Engineering Division, University of Southern California, Los Angeles, USA

    Viktor K. Prasanna

  • Indian Institute of Science, Bangalore, India

    Sriram Vajapeyam

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