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Table of contents (7 chapters)
Keywords
About this book
A Unified Approach for Timing Verification and Delay Fault Testing applies concepts developed in the context of delay fault testing to path sensitization, which allows an accurate timing analysis mechanism to be developed. This path sensitization strategy is further applied for efficient delay fault diagnosis and delay fault coverage estimation.
A new path sensitization strategy called Signal Stabilization Time Analysis (SSTA) has been developed based on the fact that primitive PDFs determine the stabilization time of the circuit outputs. This analysis has been used to develop a feasible method of identifying the primitive PDFs in a general multi-level logic circuit. An approach to determine the maximum circuit delay using this primitive PDF identification mechanism is also presented. The Primitive PDF Identification-based Timing Analysis (PITA) approach is proved to determine the maximum floating mode circuit delay exactly under any component delay model, and provides several advantages over previously floating mode timing analyzers.
A framework for the diagnosis of circuit failures caused by distributed path delay faults is also presented. A metric to quantify the diagnosability of a path delay fault for a test is also proposed. Finally, the book presents a very realistic metric for delay fault coverage which accounts for delay fault size distributions and is applicable to any delay fault model.
A Unified Approach for Timing Verification and Delay Fault Testing will be of interest to university and industry researchers in timing analysis and delay fault testing as well as EDA tool development engineers and design verification engineers dealing with timing issues in ULSI circuits.
The book should also be of interest to digital designers and others interested in knowing the state of the art in timing verification and delay fault testing.
Authors and Affiliations
Bibliographic Information
Book Title: A Unified Approach for Timing Verification and Delay Fault Testing
Authors: Mukund Sivaraman, Andrzej J. Strojwas
DOI: https://doi.org/10.1007/978-1-4419-8578-1
Publisher: Springer New York, NY
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eBook Packages: Springer Book Archive
Copyright Information: Springer Science+Business Media New York 1998
Hardcover ISBN: 978-0-7923-8079-5Published: 30 November 1997
Softcover ISBN: 978-1-4613-4639-5Published: 13 September 2012
eBook ISBN: 978-1-4419-8578-1Published: 17 September 2012
Edition Number: 1
Number of Pages: XV, 155
Topics: Circuits and Systems, Electrical Engineering, Artificial Intelligence, Computer-Aided Engineering (CAD, CAE) and Design