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  • © 1989

Wafer Scale Integration

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Table of contents (10 chapters)

  1. Front Matter

    Pages i-xix
  2. Promise and Pitfalls of WSI

    • Joe E. Brewer
    Pages 1-29
  3. Architectural Yield Optimization

    • N. R. Strader, J. C. Harden
    Pages 57-118
  4. Spare Allocation/Reconfiguration for WSI

    • W. Kent Fuchs, Sy-Yen Kuo
    Pages 119-191
  5. A WSI Image Processor

    • R. M. Lea
    Pages 193-252
  6. The 3-D Computer: An Integrated Stack of WSI Wafers

    • Michael J. Little, Jan Grinberg
    Pages 253-317
  7. Laser Restructurable Technology and Design

    • Jack Raffel, Allan H. Anderson, Glenn H. Chapman
    Pages 319-363
  8. High Yield In-Situ Fabrication of Multilevel Interconnections for WSI

    • J. F. McDonald, S. Dabral, H. T. Lin
    Pages 365-411
  9. Wafer-Scale Testing/Design for Testability

    • Donald S. Fussell, Miroslaw Malek, Sampath Rangarajan
    Pages 413-472
  10. Wafer-Scale Multichip Packaging Technology

    • R. Wayne Johnson, Richard C. Jaeger, Travis N. Blalock
    Pages 473-499
  11. Back Matter

    Pages 501-503

About this book

Wafer Scale Integration (WSI) is the culmination of the quest for larger integrated circuits. In VLSI chips are developed by fabricating a wafer with hundreds of identical circuits, testing the circuits, dicing the wafer, and packaging the good dice. In contrast in WSI, a wafer is fabricated with several types of circuits (generally referred to as cells), with multiple instances of each cell type, the cells are tested, and good cells are interconnected to realize a system on the wafer. Since most signal lines stay on the wafer, stray capacitance is low, so that high speeds are achieved with low power consumption. For the same technology a WSI implementation may be a factor of five faster, dissipate a factor of ten less power, and require one hundredth to one thousandth the volume. Successful development of WSI involves many overlapping disciplines, ranging from architecture to test design to fabrication (including laser linking and cutting, multiple levels of interconnection, and packaging). This book concentrates on the areas that are unique to WSI and that are as a result not well covered by any of the many books on VLSI design. A unique aspect of WSI is that the finished circuits are so large that there will be defects in some portions of the circuit. Accordingly much attention must be devoted to designing architectures that facilitate fault detection and reconfiguration to of WSI include fabrication circumvent the faults. Other unique aspects technology and packaging.

Editors and Affiliations

  • TRW Defense Systems Group, Redondo Beach, USA

    Earl E. Swartzlander

Bibliographic Information

  • Book Title: Wafer Scale Integration

  • Editors: Earl E. Swartzlander

  • DOI: https://doi.org/10.1007/978-1-4613-1621-3

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Kluwer Academic Publishers 1989

  • Hardcover ISBN: 978-0-7923-9003-9Published: 31 March 1989

  • Softcover ISBN: 978-1-4612-8896-1Published: 09 February 2012

  • eBook ISBN: 978-1-4613-1621-3Published: 06 December 2012

  • Edition Number: 1

  • Number of Pages: XX, 503

  • Topics: Circuits and Systems, Electrical Engineering, Processor Architectures

Buy it now

Buying options

eBook USD 169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access