Overview
- Provides a detailed background on the state of error control methods for on-chip interconnects, including Error Control Coding, Double Sampling, and On-Line Testing
- Describes the use of more complex concatenated codes such as Hamming Product Codes with Type-II HARQ, while emphasizing integration techniques for on-chip interconnect links
- Presents techniques for managing intermittent and permanent errors using a non-interrupting in-line test method with spare wire replacement
- Examines energy-efficient techniques for integrating multiple error control methods in on-chip interconnects
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Table of contents (6 chapters)
Keywords
About this book
Authors and Affiliations
Bibliographic Information
Book Title: Error Control for Network-on-Chip Links
Authors: Bo Fu, Paul Ampadu
DOI: https://doi.org/10.1007/978-1-4419-9313-7
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media, LLC 2012
Hardcover ISBN: 978-1-4419-9312-0
Softcover ISBN: 978-1-4899-8633-7
eBook ISBN: 978-1-4419-9313-7
Edition Number: 1
Number of Pages: XI, 151
Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design