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Planar Double-Gate Transistor

From technology to circuit

  • Book
  • © 2009

Overview

Editors:
  1. Amara Amara

    1. Institut Supérieur d'Electronique de Paris (ISEP), Paris, France

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    You can also search for this editor in PubMed   Google Scholar

  2. Olivier Rozeau

    1. CEA, LETI-MINATEC, France

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    You can also search for this editor in PubMed   Google Scholar

  • First book dealing with Technology and Design Interaction
  • Presents a cross-disciplinary based approach to optimize a new and complex technology
  • Covers all aspects of IC Design with advanced technologies: process, device modelling, characterization, and circuit design of analogue, digital and memory circuits
  • Introduces new circuit concepts taking benefit of the double-gate device structures

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-viii
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  2. Introduction

    Pages 1-2

  3. Multiple Gate Technologies

    • Thierry Poiroux, Maud Vinet, Simon Deleonibus
    Pages 3-25

  4. Compact Modeling of Independent Double-Gate MOSFET: A Physical Approach

    • Daniela Munteanu, Jean-Luc Autran
    Pages 27-54

  5. Compact Modeling of Double Gate MOSFET for IC Design

    • Marina Reyboz, Olivier Rozeau, Thierry Poiroux
    Pages 55-88

  6. Low Frequency Noise in Double-Gate SOI CMOS Devices

    • Jalal Jomaah, Gérard Ghibaudo
    Pages 89-104

  7. Analog Circuit Design

    • Philippe Freitas, David Navarro, Ian O'Connor, Gerard Billiot, Hervé Lapuyade, Jean-Baptiste Begueret
    Pages 105-136

  8. Logic Circuit Design with DGMOS Devices

    • Ian O'Connor, Ilham Hassoune, Xi Yang, David Navarro
    Pages 137-165

  9. SRAM Circuit Design

    • Bastien Giraud, Olivier Thomas, Amara Amara, Andrei Vladimirescu, Marc Belleville
    Pages 167-203

  10. Back Matter

    Pages 205-211
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Keywords

About this book

Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called “scaling”, has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore’s Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore’s law and each dif?culty has found a solution.

Editors and Affiliations

  • Institut Supérieur d'Electronique de Paris (ISEP), Paris, France

    Amara Amara

  • CEA, LETI-MINATEC, France

    Olivier Rozeau

Bibliographic Information

  • Book Title: Planar Double-Gate Transistor

  • Book Subtitle: From technology to circuit

  • Editors: Amara Amara, Olivier Rozeau

  • DOI: https://doi.org/10.1007/978-1-4020-9341-8

  • Publisher: Springer Dordrecht

  • eBook Packages: Engineering, Engineering (R0)

  • Copyright Information: Springer Science+Business Media B.V. 2009

  • Hardcover ISBN: 978-1-4020-9327-2Published: 30 January 2009

  • Softcover ISBN: 978-90-481-8108-7Published: 19 October 2010

  • eBook ISBN: 978-1-4020-9341-8Published: 16 January 2009

  • Edition Number: 1

  • Number of Pages: VIII, 211

  • Topics: Circuits and Systems, Solid State Physics, Spectroscopy and Microscopy, Optical and Electronic Materials

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