Authors:
- Addressing a new topic (DFM/DFY) critical at 90 nm and beyond
- No book available today with comprehensive coverage of this topic
- Book covers all CAD/CAE aspects of a SOC design flow
Part of the book series: Integrated Circuits and Systems (ICIR)
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Table of contents (8 chapters)
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Front Matter
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Back Matter
About this book
Design for Manufacturability and Yield for Nano-Scale CMOS walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process and how to address each aspect at the proper design step starting with the design and layout of standard cells and how to yield-grade libraries for critical area and lithography artifacts through place and route, CMP model based simulation and dummy-fill insertion, mask planning, simulation and manufacturing, and through statistical design and statistical timing closure of the design. It alerts the designer to the pitfalls to watch for and to the good practices that can enhance a design’s manufacturability and yield. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Authors and Affiliations
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Synopsys Inc., Mountain View, USA
Charles C. Chiang, Jamil Kawa
About the authors
Bibliographic Information
Book Title: Design for Manufacturability and Yield for Nano-Scale CMOS
Authors: Charles C. Chiang, Jamil Kawa
Series Title: Integrated Circuits and Systems
DOI: https://doi.org/10.1007/978-1-4020-5188-3
Publisher: Springer Dordrecht
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Science+Business Media B.V. 2007
Hardcover ISBN: 978-1-4020-5187-6Published: 26 July 2007
Softcover ISBN: 978-90-481-7303-7Published: 22 November 2010
eBook ISBN: 978-1-4020-5188-3Published: 15 June 2007
Series ISSN: 1558-9412
Series E-ISSN: 1558-9420
Edition Number: 1
Number of Pages: XXVII, 255
Topics: Circuits and Systems, Electronics and Microelectronics, Instrumentation, Computer-Aided Engineering (CAD, CAE) and Design, Processor Architectures, Software Engineering/Programming and Operating Systems, Nanotechnology