Skip to main content
SpringerLink
Log in

Instruction-Level Parallelism

A Special Issue of The Journal of Supercomputing

  • Book
  • © 1993

Overview

Editors:
  1. B. R. Rau

    1. Hewlett-Packard Laboratories, UK

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

  2. J. A. Fisher

    1. Hewlett-Packard Laboratories, UK

    View editor publications

    You can also search for this editor in PubMed   Google Scholar

Part of the book series: The Springer International Series in Engineering and Computer Science (SECS, volume 235)

This is a preview of subscription content, log in via an institution to check access.

Access this book

Log in via an institution
eBook USD 169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access

Licence this eBook for your library

Institutional subscriptions

Table of contents (8 chapters)

  1. Front Matter

    Pages 1-4
    Download chapter PDF

  2. An Introduction to This Special Issue

    • Richard Draper, John Riganati
    Pages 5-5

  3. Guest Editors’ Introduction

    • Josh Fisher, Bob Rau
    Pages 7-7

  4. Instruction-Level Parallel Processing: History, Overview, and Perspective

    • B. Ramakrishna Rau, Joseph A. Fisher
    Pages 9-50

  5. The Multiflow Trace Scheduling Compiler

    • P. Geoffrey Lowney, Stefan M. Freudenberger, Thomas J. Karzes, W. D. Lichtenstein, Robert P. Nix, John S. O’Donnell et al.
    Pages 51-142

  6. The Cydra 5 Minisupercomputer: Architecture and Implementation

    • Gary R. Beck, David W. L. Yen, Thomas L. Anderson
    Pages 143-180

  7. Compiling for the Cydra 5

    • James C. Dehnert, Ross A. Towle
    Pages 181-227

  8. The Superblock: An Effective Technique for VLIW and Superscalar Compilation

    • Wen-Mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann et al.
    Pages 229-248

  9. Instruction-Level Experimental Evaluation of the Multiflow Trace 14/300 VLIW Computer

    • Michael Schuette, John P. Shen
    Pages 249-271

  10. Back Matter

    Pages 273-282
    Download chapter PDF
Back to top

Keywords

About this book

Instruction-Level Parallelism presents a collection of papers that attempts to capture the most significant work that took place during the 1980s in the area of instruction-level (ILP) parallel processing. The papers in this book discuss both compiler techniques and actual implementation experience on very long instruction word (VLIW) and superscalar architectures.

Editors and Affiliations

  • Hewlett-Packard Laboratories, UK

    B. R. Rau, J. A. Fisher

Bibliographic Information

  • Book Title: Instruction-Level Parallelism

  • Book Subtitle: A Special Issue of The Journal of Supercomputing

  • Editors: B. R. Rau, J. A. Fisher

  • Series Title: The Springer International Series in Engineering and Computer Science

  • DOI: https://doi.org/10.1007/978-1-4615-3200-2

  • Publisher: Springer New York, NY

  • eBook Packages: Springer Book Archive

  • Copyright Information: Springer Science+Business Media New York 1993

  • Hardcover ISBN: 978-0-7923-9367-2Published: 31 May 1993

  • Softcover ISBN: 978-1-4613-6404-7Published: 08 October 2012

  • eBook ISBN: 978-1-4615-3200-2Published: 06 December 2012

  • Series ISSN: 0893-3405

  • Edition Number: 1

  • Number of Pages: 282

  • Topics: Processor Architectures

Publish with us

Policies and ethics

Back to top

Search

Navigation